Charge pump circuit and memory
US9030891B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 30, 2013 |
| Grant date | May 12, 2015 |
| Priority date | — |
| Expiry date | Dec 30, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/145
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Charge pump circuit and memory are provided. The charge pump circuit includes a clock driving unit, a voltage boosting unit, a boosting swing control unit, a first and second NMOS tubes, a first and second current mirror units. The clock driving unit is adapted to form and output clock driving signals to the voltage boosting unit. The voltage boosting unit is adapted to boost voltage and output it to the boosting swing control unit and the first current minor unit. The boosting swing control unit is adapted to output boosting swing control signals to the first NMOS tube. The first current minor unit is to output first mirror current and the second current minor unit is to minor the first mirror current and output second minor current. Frequency of the clock driving signal varies with leakage current load, and size of the charge pump circuit and power consumption are reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.