Isolating, at least in part, local row or column circuitry of memory cell before establishing voltage differential to permit reading of cell
US9030906B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 6, 2012 |
| Grant date | May 12, 2015 |
| Priority date | — |
| Expiry date | Jul 21, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C13/004
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment may include local row and column circuitry that are local to a memory cell of a memory device. Either the local row circuitry or the local column circuitry may be electrically isolated, at least in part, from at least one remaining portion of the memory device during the establishing of a voltage differential between the local row circuitry and the local column circuitry that is to permit the memory cell to be read during a read of the memory cell. The read may occur subsequent to the establishing of the voltage differential. Many variations, modifications, and alternatives are possible without departing from this embodiment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.