System and method for adaptive bit rate programming of a memory device
US9032140B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 28, 2013 |
| Grant date | May 12, 2015 |
| Priority date | — |
| Expiry date | Aug 5, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3486
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The disclosure relates to an electronic memory system, and more specifically, to a system for adaptive bit rate programming of a memory device, and a method for adaptive bit rate programming of a memory device. According to an embodiment, a system for adaptive bit rate programming of a memory device including a plurality of memory cells is provided, wherein the memory cells are configured to be electrically programmable by application of a current supplied by a current source, the system including selection devices for selecting memory cells for programming based on availability of current from the current source.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.