Modular power converter having reduced switching loss
US9041011B2 · kind B2 · utility
1Cited by
1References
11Claims
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Assignee
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Key dates
| Filing date | Jul 3, 2013 |
| Grant date | May 26, 2015 |
| Priority date | — |
| Expiry date | Jul 3, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02B70/10
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
In one implementation, a modular power converter having a reduced switching loss includes a package, a field-effect transistor (FET) including a gate terminal, a drain terminal, and a source terminal, and fabricated on a semiconductor die situated inside the package, and a driver circuit inside the package. The driver circuit is configured to drive the gate terminal of the FET. The driver circuit is further configured to sample a drain-to-source voltage (VDS) of the FET directly from the drain terminal and the source terminal, thereby enabling the reduced switching loss.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.