Integrated circuitry comprising transistors with broken up active regions
US9041144B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | May 17, 2013 |
| Grant date | May 26, 2015 |
| Priority date | — |
| Expiry date | Aug 8, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/42
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some embodiments include integrated circuits having first and second transistors. The first transistor is wider than the second transistor. The first and second transistors have first and second active regions, respectively. Dielectric features are associated with the first active region and break up the first active region. The second active region is not broken up to the same extent as the first active region. Some embodiments include methods of forming transistors. Active areas of first and second transistors are formed. The active area of the first transistor is wider than the active area of the second transistor. Dielectric features are formed in the active area of the first transistor. The active area of the first transistor is broken up to a different extent than the active area of the second transistor. The active areas of the first and second transistors are simultaneously doped.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.