Hybrid semiconductor module structure
US9041176B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 11, 2013 |
| Grant date | May 26, 2015 |
| Priority date | — |
| Expiry date | May 23, 2033 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/53174
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Some implementations provide a structure that includes a first package substrate, a first component, a second package substrate, a second component, and a third component. The first package substrate has a first area. The first component has a first height and is positioned on the first area. The second package substrate is coupled to the first package substrate. The second package substrate has second and third areas. The second area of the second package substrate vertically overlaps with the first area of the first package substrate The third area of the second package substrate is non-overlapping with the first area of the first package substrate. The second component has a second height and is positioned on the second area. The third component is positioned on the third area. The third component has a third height that is greater than each of the first and second heights.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.