Methods and systems for mapping a peripheral function onto a legacy memory interface
US9043513B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2014 |
| Grant date | May 26, 2015 |
| Priority date | — |
| Expiry date | Dec 17, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system includes a CPU that communicates commands and addresses to a main-memory module. The module includes a buffer circuit that relays commands and data between the CPU and the main memory. The memory module additionally includes an embedded processor that shares access to main memory in support of peripheral functionality, such as graphics processing, for improved overall system performance. The buffer circuit facilitates the communication of instructions and data between CPU and the peripheral processor in a manner that minimizes or eliminates the need to modify CPU, and consequently reduces practical barriers to the adoption of main-memory modules with integrated processing power.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.