Chi-Ming Yeung
21Patents
4h-index
19Co-inventors
56Inventor score
Filing activity: Aug 9, 2013 → Aug 21, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9043513B2 | Methods and systems for mapping a peripheral function onto a legacy memory interface | Emerging Cross-Sectional Technologies | 7 | Active |
| US9880971B2 | Memory appliance for accessing memory | Electricity | 5 | Active |
| US10613995B2 | Training and operations with a double buffered memory topology | Electricity | 4 | Active |
| US11294830B2 | Training and operations with a double buffered memory topology | Electricity | 4 | Active |
| US9824779B2 | Memory error repair | Physics | 3 | Active |
| US10169258B2 | Memory system design using buffer(s) on a mother board | Emerging Cross-Sectional Technologies | 3 | Active |
| US9275733B2 | Methods and systems for mapping a peripheral function onto a legacy memory interface | Emerging Cross-Sectional Technologies | 2 | Active |
| US9841791B2 | Circuit board assembly configuration | Electricity | 1 | Active |
| US11210240B2 | Memory appliance couplings and operations | Emerging Cross-Sectional Technologies | 1 | Active |
| US10437747B2 | Memory appliance couplings and operations | Emerging Cross-Sectional Technologies | 1 | Active |
| US9921751B2 | Methods and systems for mapping a peripheral function onto a legacy memory interface | Emerging Cross-Sectional Technologies | 0 | Active |
| US8922245B2 | Power saving driver design | Physics | 0 | Active |
| US12141081B2 | Training and operations with a double buffered memory topology | Electricity | 0 | Active |
| US10614002B2 | Memory system design using buffer(S) on a mother board | Emerging Cross-Sectional Technologies | 0 | Active |
| US12406118B1 | System and method for managing serial lanes in a multi-user emulation system | Physics | 0 | Active |
| US11768780B2 | Training and operations with a double buffered memory topology | Electricity | 0 | Active |
| US11003601B2 | Memory system design using buffer(s) on a mother board | Emerging Cross-Sectional Technologies | 0 | Active |
| US12099454B2 | Memory appliance couplings and operations | Emerging Cross-Sectional Technologies | 0 | Active |
| US10255220B2 | Dynamic termination scheme for memory communication | Physics | 0 | Active |
| US11537540B2 | Memory system design using buffer(s) on a mother board | Emerging Cross-Sectional Technologies | 0 | Active |
| US11907139B2 | Memory system design using buffer(s) on a mother board | Emerging Cross-Sectional Technologies | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.