Patent · US Active

Techniques for reusing components of a logical operations functional block as an error correction code correction unit

US9043673B2 · kind B2 · utility

0Cited by

1References

20Claims

0Family size

Assignee

International Business Machines Corporation · US

Inventors

Markus Kaltenback · Eppelheim, DE
Jens Leenstra · Nagold, DE
Philipp Oehler · Schrobenhausen, DE
Philipp Panitz · Eppelheim, DE

Key dates

Filing date	Feb 25, 2013
Grant date	May 26, 2015
Priority date	—
Expiry date	Apr 12, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH03M13/05
WIPO fieldBasic communication processes
WIPO sectorElectrical engineering

Abstract

A logical operations functional block for an execution unit of a processor includes a first input data link for a first operand and a second input data link for a second operand. The execution unit includes a register connected to an error correction code detection unit. The logical operations functional block includes a look-up table configured to receive an error correction code syndrome from the error correction code detection unit. The logical operations functional block also includes a multiplexer configured to receive an output signal from the look-up table at a first input and the first operand at a second input, wherein an output of the multiplexer is coupled to the first input data link of a logical functional unit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.