Method and apparatus for error-correction in and processing of GFP-T superblocks
US9043685B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Feb 5, 2010 |
| Grant date | May 26, 2015 |
| Priority date | — |
| Expiry date | Feb 7, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/0057
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention discloses a method and apparatus for processing and error correction of a GFP-T superblock, where the 64 bytes of payload data of a first superblock are buffered in the first page of a two-page buffer. The flag byte is buffered in a separate buffer, and a CRC operation is performed in a separate logic element. The result of the CRC operation is checked against a single syndrome table which may indicate single- or multi-bit errors. As the payload data of the first superblock is processed and read out of the first page of the two-page buffer, the payload data of a second superblock is written into the second page of the two-page buffer to be processed and corrected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.