Balanced processing using heterogeneous cores
US9047137B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Apr 10, 2012 |
| Grant date | Jun 2, 2015 |
| Priority date | — |
| Expiry date | Aug 30, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Technologies are generally described for a multi-processor core and a method for transferring threads in a multi-processor core. In an example, a multi-core processor may include a first group including a first core and a second core. A first sum of the operating frequencies of the cores in the first group corresponds to a first total operating frequency. The multi-core processor may further include a second group including a third core. A second sum of the operating frequencies of the cores in the second group may correspond to a second total operating frequency that is substantially the same as the first total operating frequency. A hardware controller may be configured in communication with the first, second and third core. A memory may be configured in communication with the hardware controller and may include an indication of at least the first group and the second group.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.