Coding techniques for reducing write cycles for memory
US9047975B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2012 |
| Grant date | Jun 2, 2015 |
| Priority date | — |
| Expiry date | Sep 20, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/23
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Structures and methods for encoding data to reduce write cycles in a semiconductor memory device are disclosed herein. In one embodiment, a method of writing data to a semiconductor memory device can include: (i) determining a number of significant bits for data to be written in the semiconductor memory device; (ii) determining a tag associated with the data to be written in the semiconductor memory device, where the tag is determined based on the determined number of significant bits; (iii) encoding the data when the tag has a first state, where the tag is configured to indicate data encoding that comprises using N bits of the encoded data to store M bits of the data, where M and N are both positive integers and N is greater than M; and (iv) writing the encoded data and the tag in the semiconductor memory device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.