Bit-flipping in memories
US9047981B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2012 |
| Grant date | Jun 2, 2015 |
| Priority date | — |
| Expiry date | Feb 26, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/417
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data stored in SRAM cells are periodically flipped e.g., before long idle periods. Operating the memories in both a ‘flipped’ mode and a ‘non-flipped’ mode helps cause the Bias Temperature Instability (BTI) degradation to be symmetric, thereby not degrading the Static Noise Margin (SNM) degradation of the cells. The data stored in memory locations is flipped by reading out the data, inverting the read out data, and writing the inverted read out data into the memory locations until the memory locations of the SRAM have been read out and written. When the memory operates in flipped mode, data read from and written into the memory is inverted to maintain transparency to the memory user. After operating the data in flipped mode for a period of time, the flipped data stored in the memory is reflipped to operate in the non-flipped mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.