Package systems having interposers
US9048233B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 26, 2010 |
| Grant date | Jun 2, 2015 |
| Priority date | — |
| Expiry date | Dec 31, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/381
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package system includes an integrated circuit disposed over an interposer. The interposer includes a first interconnect structure. A first substrate is disposed over the first interconnect structure. The first substrate includes at least one first through silicon via (TSV) structure therein. A molding compound material is disposed over the first interconnect structure and around the first substrate. The integrated circuit is electrically coupled with the at least one first TSV structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.