Resistive switching for non volatile memory device using an integrated breakdown element
US9048658B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2014 |
| Grant date | Jun 2, 2015 |
| Priority date | — |
| Expiry date | Apr 30, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/76
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of suppressing propagation of leakage current in an array of switching devices. The method includes providing a dielectric breakdown element integrally and serially connected to a switching element within each of the switching device. A read voltage (for example) is applied to a selected cell. The propagation of leakage current is suppressed by each of the dielectric breakdown element in unselected cells in the array. The read voltage is sufficient to cause breakdown in the selected cells but insufficient to cause breakdown in the serially connected, unselected cells in a specific embodiment. Methods to fabricate of such devices and to program, to erase and to read the device are provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.