Molded glass lid for wafer level packaging of opto-electronic assemblies
US9052445B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 19, 2012 |
| Grant date | Jun 9, 2015 |
| Priority date | — |
| Expiry date | Oct 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/10121
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An opto-electronic assembly is provided comprising a substrate (generally of silicon or glass) for supporting a plurality of interconnected optical and electrical components. A layer of sealing material is disposed to outline a defined peripheral area of the substrate. A molded glass lid is disposed over and bonded to the substrate, where the molded glass lid is configured to create a footprint that matches the defined peripheral area of the substrate. The bottom surface of the molded glass lid includes a layer of bonding material that contacts the substrate's layer of sealing material upon contact, creating a bonded assembly. In one form, a wafer level assembly process is proposed where multiple opto-electronic assemblies are disposed on a silicon wafer and multiple glass lids are molded in a single sheet of glass that is thereafter bonded to the silicon wafer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.