Thermally aware pin assignment and device placement
US9053285B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 2013 |
| Grant date | Jun 9, 2015 |
| Priority date | — |
| Expiry date | Oct 17, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/398
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the disclosure relate to methods for facilitating the design of an integrated circuit (IC) using thermally aware pin assignment and device placement. The method includes creating a layout for the IC, the layout including a plurality of macros each having devices and pin assignments and revising the layout for the IC by repositioning a macro or a device to meet a timing requirement of the IC. The method also includes creating a thermal map of the IC based on the layout for the IC and a workload model for the IC and identifying at least one thermally critical pin assignment based on the thermal map of the IC. The method includes revising the layout by repositioning a thermally critical pin assignment and a device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.