Patent · US Active

Transistors and fabrication method

US9054021B2 · kind B2 · utility

2Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 15, 2013
Grant dateJun 9, 2015
Priority date
Expiry dateMar 15, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D62/405

Abstract

A method is provided for fabricating a transistor. The method includes providing a semiconductor substrate, and forming a metal layer on the semiconductor substrate. The method also includes forming a silicon layer having at least one layer of graphene-like silicon on the metal layer, and forming a metal oxide layer by oxidizing a portion of the metal layer underneath the silicon layer. Further, the method includes forming a source region and a drain region connecting with the silicon layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.