Semiconductor structure

US9054187B2 · kind B2 · utility

Assignee

• UNITED MICROELECTRONICS CORP. · TW

Inventors

• An-Chi Liu · Tainan, TW
• Chun-Hsien Lin · Tainan, TW
• Yu-Cheng Tung
• Chien-Ting Lin · Tainan, TW
• Wen-Tai Chiang · Tainan, TW
• Shih-Hung Tsai · Tainan, TW
• Ssu-I Fu
• Ying-Tsung Chen · Hsinchu, TW
• Chih-Wei Chen · Tainan, TW

Key dates

• Filing date: Nov 26, 2013
• Grant date: Jun 9, 2015
• Expiry date: Feb 12, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6744

Abstract

A non-planar semiconductor structure comprises a substrate, at least one fin structure on the substrate, a gate covering parts of the fin structures and part of the substrate such that the fin structure is divided into a channel region stacking with the gate and source/drain region at both sides of the gate, a plurality of epitaxial structures covering on the source/drain region of the fin structures, a recess is provided between the channel region of the fin structure and the epitaxial structure, and a spacer formed on the sidewalls of the gate and the epitaxial structures, wherein the portion of the spacer filling in the recesses is flush with the top surface of the epitaxial structures.