Non-planar transistors and methods of fabrication thereof

US9054194B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Chih-Hang Tung · Hsinchu, TW
• Chin-Hsiang Lin · Hsinchu, TW
• Cheng-Hung Chang · Riverview Drive, CN
• Sey-Ping Sun · Austin, US

Key dates

• Filing date: Jan 6, 2010
• Grant date: Jun 9, 2015
• Expiry date: Oct 22, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/647

Abstract

Non-planar transistors and methods of fabrication thereof are described. In an embodiment, a method of forming a non-planar transistor includes forming a channel region on a first portion of a semiconductor fin, the semiconductor fin having a top surface and sidewalls. A gate electrode is formed over the channel region of the semiconductor fin, and an in-situ doped semiconductor layer is grown on the top surface and the sidewalls of the semiconductor fin on opposing sides of the gate electrode using a selective epitaxial growth process. At least a part of the doped semiconductor layer is converted to form a dopant rich region.