Semiconductor-on-insulator device including stand-alone well implant to provide junction butting
US9059291B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 11, 2013 |
| Grant date | Jun 16, 2015 |
| Priority date | — |
| Expiry date | Sep 11, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6719
Abstract
A semiconductor device includes a semiconductor-on-insulator (SOI) substrate having a bulk substrate layer, an active semiconductor layer, and a buried insulator layer interposed between the bulk substrate layer and the active semiconductor layer. A first source/drain (S/D) region includes a first stand-alone butting implant having a first butting width. A second S/D region includes a second stand-alone butting implant having a second butting width. A gate well-region is interposed between the first and second S/D regions. The gate well-region has a gate width that is greater than the first and second butting widths.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.