Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device

US9064730B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Wayne F. Ellis · Campbell, US
• John Kim · Santa Clara, US

Key dates

• Filing date: Apr 28, 2014
• Grant date: Jun 23, 2015
• Expiry date: Apr 28, 2034

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D89/10

Abstract

Techniques for forming a contact to a buried diffusion layer in a semiconductor memory device are disclosed. The techniques may be realized as a semiconductor memory device. The semiconductor memory device may comprise a substrate comprising an upper layer, an array of dummy pillars formed on the upper layer of the substrate and arranged in rows and columns, and an array of active pillars formed on the upper layer of the substrate and arranged in rows and columns. Each of the dummy pillars may extend upward from the upper layer and have a bottom contact that is electrically connected with the upper layer of the substrate. Each of the active pillars may extend upward from the upper layer and have an active first region, an active second region, and an active third region. Each of the active pillars may also be electrically connected with the upper layer of the substrate.