Methods for manufacturing a field-effect semiconductor device
US9070712B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 9, 2013 |
| Grant date | Jun 30, 2015 |
| Priority date | — |
| Expiry date | Aug 9, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a field-effect transistor is disclosed. In one aspect, the method includes forming a channel layer comprising germanium over a substrate. The method additionally includes forming a gate structure on the channel layer, where the gate structure comprises a gate layer comprising silicon, and the gate layer has sidewalls above a surface of the channel layer. The method additionally includes forming sidewall spacers comprising silicon dioxide on the sidewalls by subjecting the gate structure to a solution adapted for forming a chemical silicon oxide on materials comprising silicon. The method further includes forming elevated source/drain structures on the channel layer adjacent to the gate structure by selectively epitaxially growing a source/drain material on the channel layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.