Configurable embedded memory system
US9075930B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2012 |
| Grant date | Jul 7, 2015 |
| Priority date | — |
| Expiry date | Jan 3, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment of a memory module is disclosed. This memory module is a configurable hard macro. A portion of this memory module includes a data input multiplexer coupled to select between cascaded data and direct/bused data. Such portion further includes, a memory coupled to receive output from the data input multiplexer for storage therein, and a register input multiplexer coupled to select between read data from the memory and the cascaded data. This memory module further includes: a register coupled to receive output from the register input multiplexer, a latch/register mode multiplexer coupled to select between the read data from the memory and registered data from the register, and a data output multiplexer coupled to select between the cascaded data and output from the latch/register mode multiplexer to provide output data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.