System and method for lithography exposure with correction of overlay shift induced by mask heating
US9081293B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Oct 17, 2013 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Oct 17, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70783
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of exposing a wafer substrate includes receiving an integrated circuit (IC) design layout defining a pattern; determining a temperature profile of a mask based on the IC design layout, the pattern being formed on the mask; calculating a pre-corrected overlay shift for the mask based on the calculated temperature profile; and exposing a resist layer coated on a substrate using the mask with overlay compensation based on the pre-corrected overlay shift.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.