Flash memory device and method of programming the same
US9082488B2 · kind B2 · utility
4Cited by
0References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 18, 2012 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Apr 25, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3459
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor memory device includes a memory block configured to include memory cells coupled to word lines and a peripheral circuit configured to perform a first program operation, a program verifying operation and a second program verifying operation for memory cells coupled to a word line selected from the word lines, and supply program allowable voltages having different levels to selected bit lines of program allowable cells located between program inhibition cells in the first program operation and the second program operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.