Semiconductor device and manufacturing method thereof
US9082643B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 2013 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Sep 7, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D88/00
Abstract
A semiconductor device is provided which includes an N-type semiconductor layer and a P-type semiconductor layer coexisting in the same wiring layer without influences on the properties of a semiconductor layer. The semiconductor device includes a first wiring layer with a first wiring, a second wiring layer with a second wiring, and first and second transistors provided in the first and second wiring layers. The first transistor includes a first gate electrode, a first gate insulating film, a first oxide semiconductor layer, a first hard mask layer, and first insulating sidewall films covering the sides of the first oxide semiconductor layer. The second transistor includes a second gate electrode, a second gate insulating film, a second oxide semiconductor layer, and a second hard mask layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.