Passivation process to prevent TiW corrosion
US9082649B2 · kind B2 · utility
1Cited by
2References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2014 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Nov 25, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/13147
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is an under bump metallization structure including a plurality of metal or metal alloy layers formed on chip bond pads with improved reliability due to a sacrificial metal oxide and the methods of making the under bump metallization structures. A barrier layer is formed over a bond pad. A seed layer is formed over the barrier layer. A bump resist pattern is formed exposing an area over the bond pad and a metal layer is electroplated on the seed layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.