Partitioned silicon photomultiplier with delay equalization
US9082675B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 12, 2013 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Mar 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/10
Abstract
A photon detection device includes a first wafer having an array of photon detection cells partitioned into a plurality of photon detection blocks arranged in the first wafer. A second wafer having a plurality of block readout circuits arranged thereon is also included. An interconnect wafer is disposed between the first wafer and the second wafer. The interconnect wafer includes a plurality of conductors having substantially equal lengths. Each one of the plurality of conductors is coupled between a corresponding one of the plurality of photon detection blocks in the first wafer and a corresponding one of the plurality of block readout circuits such that signal propagation delays between each one of the plurality of photon detection blocks and each one of the plurality of block readout circuits are substantially equal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.