Methods to improve FinFet semiconductor device behavior using co-implantation under the channel region
US9082698B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 7, 2014 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Mar 7, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/371
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
One illustrative method disclosed includes, among other things, forming a fin in a substrate, forming a well implant region in at least the substrate, forming a punch-stop implant region in the fin, performing at least one neutral implantation process with at least one neutral implant material to form a neutral boron-diffusion-blocking implant region in the fin, wherein an upper surface of the neutral boron-diffusion-blocking implant region is positioned closer to an upper surface of the fin than either the punch-stop implant region or the well implant region and, after forming the well implant region, the punch-stop implant region and the neutral boron-diffusion-blocking implant region, forming a gate structure above the fin.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.