System and method for an electronic package with a fail-open mechanism
US9082737B2 · kind B2 · utility
0Cited by
6References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 15, 2012 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | May 11, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package including a fail open mechanism is disclosed. An embodiment includes a semiconductor package having a chip carrier, a chip disposed on the chip carrier and an encapsulant encapsulating the chip and the chip carrier. The semiconductor package further including a pin protruding from the encapsulant and a fail open mechanism disposed on the encapsulant and connected to the pin, wherein the fail open mechanism is configured to be disconnected from the pin if a temperature exceeds a pre-determined temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.