Patent · US Active

FinFET having suppressed leakage current

US9082851B2 · kind B2 · utility

13Cited by
14References
13Claims
0Family size

Assignee

Inventors

Key dates

Filing dateNov 22, 2013
Grant dateJul 14, 2015
Priority date
Expiry dateNov 23, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/017

Abstract

A FinFET device which includes: a semiconductor substrate; a three dimensional fin oriented perpendicularly to the semiconductor substrate; a local trench isolation between the three dimensional fin and an adjacent three dimensional fin; a nitride layer on the local trench isolation; a gate stack wrapped around a central portion of the three dimensional fin and extending through the nitride layer; sidewall spacers adjacent to the gate stack and indirectly in contact with the nitride layer, two ends of the three dimensional fin extending from the sidewall spacers, a first end being for the source of the FET device and a second end being for a drain of the FET device; and an epitaxial layer covering each end of the three dimensional fin and being on the nitride layer. Also disclosed is a method of fabricating a FinFET device.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.