Embedded cost-efficient SONOS non-volatile memory

US9082867B2 · kind B2 · utility

Assignee

• TOWER PARTNERS SEMICONDUCTOR CO., LTD. · IL

Inventors

• Yakov Roizin · Afula, IL
• Evgeny Pikhay · Haifa, IL
• Vladislav Dayan · Timrat, IL
• Micha Gutman · Migdal HaEmek, IL

Key dates

• Filing date: Jan 31, 2013
• Grant date: Jul 14, 2015
• Expiry date: Jul 20, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/037

Abstract

A cost-efficient SONOS (CEONOS) non-volatile memory (NVM) cell for use in a CMOS IC, where the CEONOS NVM cell requires two or three additional masks, but is otherwise substantially formed using the same standard CMOS flow processes used to form NMOS transistors. The cell is similar to an NMOS cell but includes an oxide-nitride-oxide (ONO) layer that replaces the standard NMOS gate oxide and serves to store NVM data. The cells utilize special source/drain engineering to include pocket implants and lightly-doped drain extensions, which facilitate program/erase of the CEONOS NVM cells using low voltages (e.g., 5V). The polysilicon gate, source/drain contacts and metallization are formed using corresponding NMOS processes. The CEONOS NVM cells are arranged in a space-efficient X-array pattern such that each group of four cells share a drain diffusion and three bit lines. Programming involves standard CHE injection or pulse agitated interface substrate hot electron injection (PAISHEI).