Fabrication method of packaging substrate
US9084341B2 · kind B2 · utility
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1References
9Claims
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Assignee
Inventors
Key dates
| Filing date | Feb 26, 2014 |
| Grant date | Jul 14, 2015 |
| Priority date | — |
| Expiry date | Feb 26, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A packaging substrate is provided, which includes: a core layer having opposite first and second surfaces; two circuit layers formed on the first and second surfaces, respectively; a plurality of conductive through holes penetrating the core layer and electrically connected to the first and second circuit layers; two insulating protection layers disposed on the first and second surfaces of the core layer and the circuit layers; and a carrier attached to one of the insulating protection layers for preventing cracking of the packaging substrate during transportation or packaging.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.