Statistical overlay error prediction for feed forward and feedback correction of overlay errors, root cause analysis and process control
US9087176B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 20, 2014 |
| Grant date | Jul 21, 2015 |
| Priority date | — |
| Expiry date | Mar 20, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/02
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method to collect data and train, validate and deploy statistical models to predict overlay errors using patterned wafer geometry data and other relevant information includes selecting a training wafer set, measuring at multiple lithography steps and calculating geometry differences, applying a plurality of predictive models to the training wafer geometry differences and comparing predicted overlay to the measured overlay on the training wafer set. The most accurate predictive model is identified and the results fed-forward to the lithography scanner tool which can correct for these effects and reduce overlay errors during the wafer scan-and-expose processes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.