Patent · US Active

Self aligned embedded gate carbon transistors

US9087811B2 · kind B2 · utility

3Cited by
6References
6Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 16, 2013
Grant dateJul 21, 2015
Priority date
Expiry dateOct 11, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10K85/221
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Transistors with self-aligned source/drain regions a gate structure embedded in a substrate; self-aligned source and drain contacts embedded in the substrate around the gate structure; and a channel layer over the gate structure and self-aligned source and drain contacts. The source and drain contacts extend above the channel layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.