Semiconductor structures with metal lines
US9087839B2 · kind B2 · utility
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12References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2013 |
| Grant date | Jul 21, 2015 |
| Priority date | — |
| Expiry date | Mar 29, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed are semiconductor structures with metal lines and methods of manufacture which reduce or eliminate extrusion formation. The method includes forming a metal wiring comprising a layered structure of metal materials with an upper constraining layer. The method further includes forming a film on the metal wiring which prevents metal extrusion during an annealing process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.