Matthew D. Moon
19Patents
4h-index
50Co-inventors
63Inventor score
Filing activity: Dec 30, 1999 → Oct 25, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6340601B1 | Method for reworking copper metallurgy in semiconductor devices | Electricity | 16 | Expired |
| US7382055B2 | Integrated thin-film resistor with direct contact | Electricity | 6 | Active |
| US7301752B2 | Formation of metal-insulator-metal capacitor simultaneously with aluminum metal wiring level using a hardmask | Emerging Cross-Sectional Technologies | 6 | Expired |
| US7303972B2 | Integrated thin-film resistor with direct contact | Electricity | 4 | Expired |
| US9685362B2 | Apparatus and method for centering substrates on a chuck | Emerging Cross-Sectional Technologies | 2 | Active |
| US7682945B2 | Phase change element extension embedded in an electrode | Emerging Cross-Sectional Technologies | 1 | Active |
| US9997385B2 | Centering substrates on a chuck | Emerging Cross-Sectional Technologies | 1 | Active |
| US10224225B2 | Centering substrates on a chuck | Emerging Cross-Sectional Technologies | 1 | Active |
| US9275868B2 | Uniform roughness on backside of a wafer | Electricity | 1 | Active |
| US9390969B2 | Integrated circuit and interconnect, and method of fabricating same | Electricity | 0 | Active |
| US9087839B2 | Semiconductor structures with metal lines | Electricity | 0 | Active |
| US9330988B1 | Method of fine-tuning process controls during integrated circuit chip manufacturing based on substrate backside roughness | Electricity | 0 | Active |
| US11562519B1 | System and method for creating and delivering handwritten greeting cards | Physics | 0 | Active |
| US9006703B2 | Method for reducing lateral extrusion formed in semiconductor structures and semiconductor structures formed thereof | Electricity | 0 | Active |
| US9059258B2 | Controlled metal extrusion opening in semiconductor structure and method of forming | Electricity | 0 | Active |
| US9484301B2 | Controlled metal extrusion opening in semiconductor structure and method of forming | Electricity | 0 | Active |
| US9576863B2 | Method of fine-tuning process controls during integrated circuit chip manufacturing based on substrate backside roughness | Electricity | 0 | Active |
| US7511940B2 | Formation of metal-insulator-metal capacitor simultaneously with aluminum metal wiring level using a hardmask | Emerging Cross-Sectional Technologies | 0 | Active |
| US8450168B2 | Ferro-electric capacitor modules, methods of manufacture and design structures | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.