Isolation device
US9087853B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2013 |
| Grant date | Jul 21, 2015 |
| Priority date | — |
| Expiry date | Nov 26, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/126
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one embodiment, an isolation device has a substrate, a metal plate, a conductive layer, first and second isolation layers are disclosed. The conductive layer may be formed within the substrate. The conductive layer may be arranged coupled to the metal plate, so as to receive a capacitively coupled signal from the metal plate. The first and second isolation layers may be sandwiched between the metal plate and the conductive layer. In another embodiment, an isolation device having a semiconductor substrate, a topmost metal layer and a plurality of additional metal layers is disclosed. The isolation device further has an isolation capacitor formed using the topmost metal layer and a conductive layer coupled to at least one of the plurality of additional metal layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.