Method and apparatus for performing self-testing within an IC device

US9091726B1 · kind B1 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Markus Regner · Munich, DE
• Heiko Ahrens · Munich, DE
• Vladimir Vorisek · Forstinning, DE

Key dates

• Filing date: Feb 24, 2014
• Grant date: Jul 28, 2015
• Expiry date: Feb 24, 2034

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/31922
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

An integrated circuit (IC) device, and method therefor, the IC device comprising a plurality of self-test components arranged to execute self-tests in parallel during a self-test execution phase of the IC device, and at least one clock control component arranged to provide at least one clock signal to the plurality of self-test components at least during the self-test execution phase of the IC device. The at least one clock control component is further arranged to receive at least one indication that self-testing has ceased within at least a first self-test component, and dynamically modulate the at least one clock signal provided to at least one further self-test component for which self-testing has not ceased to increase a clock rate of the at least one clock signal upon receipt of an indication that self-test execution has ceased within the at least first self-test component.