Patent · US Active

Startup circuits with native transistors

US9092045B2 · kind B2 · utility

1Cited by
9References
19Claims
0Family size

Assignee

Inventor

Key dates

Filing dateApr 18, 2013
Grant dateJul 28, 2015
Priority date
Expiry dateDec 10, 2033

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG05F3/30
  • WIPO fieldControl
  • WIPO sectorInstruments

Abstract

Startup circuits with native transistors. In some embodiments, a startup circuit may include a first inverter configured to receive a bandgap voltage (Vbg) from a bandgap reference circuit and to produce an output voltage (VOUT), and a second inverter operably coupled to the first inverter to form a latch, the latch configured to maintain a value of VOUT, the second inverter including a native transistor, the native transistor having a gate terminal coupled to VOUT and a source terminal coupled to Vbg. In other embodiments, a method may include receiving Vbg at a startup circuit and outputting VOUT configured to change in response to Vbg rising above Vtrig or falling below Vtrig, where the power consumption of the startup circuit is based at least in part upon a voltage value applied to a source terminal of a native transistor within the startup circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.