SIMD processor with programmable counters externally configured to count executed instructions having operands of particular register size and element size combination
US9092214B2 · kind B2 · utility
1Cited by
5References
14Claims
0Family size
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Key dates
| Filing date | Mar 29, 2012 |
| Grant date | Jul 28, 2015 |
| Priority date | — |
| Expiry date | Jan 5, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor includes an execution unit to execute instructions, where each operand of each executed instruction has one or more elements of an element size and at least one operand of the instruction corresponds to a register of a register size. The processor further includes a counter configured to count a number of instructions that have been executed by the execution unit associated with a particular combination of register size and element size.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.