Inventor · Portland, OR, US

Ronak Singhal

38Patents
7h-index
75Co-inventors
72Inventor score

Filing activity: Nov 2, 2000 → Aug 29, 2022

Most-cited inventions

PatentTitleAreaCited byStatus
US6981129B1 Breaking replay dependency loops in a processor using a rescheduled replay queue Physics 72 Expired
US7181598B2 Prediction of load-store dependencies in a processing agent Physics 30 Expired
US6877086B1 Method and apparatus for rescheduling multiple micro-operations in a processor using a replay queue and a counter Physics 30 Expired
US7757045B2 Synchronizing recency information in an inclusive cache hierarchy Physics 12 Active
US9858167B2 Monitoring the operation of a processor Physics 10 Active
US7383418B2 Method and apparatus for prefetching data to a lower level cache memory Physics 8 Expired
US9786338B2 Multiple register memory access instructions, processors, methods, and systems Physics 7 Active
US9990202B2 Packed data element predication processors, methods, systems, and instructions Physics 6 Active
US9424034B2 Multiple register memory access instructions, processors, methods, and systems Physics 6 Active
US10089229B2 Cache allocation with code and data prioritization Physics 3 Active
US10430193B2 Packed data element predication processors, methods, systems, and instructions Physics 3 Active
US10163468B2 Multiple register memory access instructions, processors, methods, and systems Physics 3 Active
US10153011B2 Multiple register memory access instructions, processors, methods, and systems Physics 2 Active
US10170165B2 Multiple register memory access instructions, processors, methods, and systems Physics 2 Active
US9081688B2 Obtaining data for redundant multithreading (RMT) execution Physics 2 Active
US10963257B2 Packed data element predication processors, methods, systems, and instructions Physics 2 Active
US9563564B2 Cache allocation with code and data prioritization Physics 2 Active
US10141033B2 Multiple register memory access instructions, processors, methods, and systems Physics 2 Active
US8793689B2 Redundant multithreading processor Physics 1 Active
US10102888B2 Multiple register memory access instructions, processors, methods, and systems Physics 1 Active
US10496413B2 Efficient hardware-based extraction of program instructions for critical paths Physics 1 Active
US11442734B2 Packed data element predication processors, methods, systems, and instructions Physics 1 Active
US9594648B2 Controlling non-redundant execution in a redundant multithreading (RMT) processor Physics 1 Active
US10153012B2 Multiple register memory access instructions, processors, methods, and systems Physics 1 Active
US9092214B2 SIMD processor with programmable counters externally configured to count executed instructions having operands of particular register size and element size combination Physics 1 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.