Methods of forming semiconductor device using bowing control layer
US9093500B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2014 |
| Grant date | Jul 28, 2015 |
| Priority date | — |
| Expiry date | Apr 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A bowing control pattern is formed on an intermediate layer. A hardmask pattern is formed on the bowing control layer. The hardmask pattern has a first opening, and the bowing control pattern has a second opening. A third opening passes through the intermediate layer and is connected to the second opening. The bowing control pattern includes first and second edges on a lower end of the second opening, and a third edge on an upper end of the second opening. When a first point on the first edge, a second point on the second edge, and a third point on a horizontal line passing through the third edge are defined, an intersecting angle between a first side from the first point to the second point, and a second side from the second point to the third point is from about 50° to about 80°.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.