Manufacturing method for a device with transistors strained by silicidation of source and drain zones

US9093552B2 · kind B2 · utility

Assignee

• COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVES · FR

Inventors

• Fabrice Nemouchi · Moirans, FR
• Patrice Gergaud · La Buisse, FR
• Thierry Poiroux · Voiron, FR
• Bernard Previtali · Grenoble, FR

Key dates

• Filing date: Aug 22, 2012
• Grant date: Jul 28, 2015
• Expiry date: Aug 22, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76855
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for making a microelectronic device with transistors, in which silicided source and drain zones are formed to apply a compressive strain on the channel, in some transistors.