MPS-C2 semiconductor device having shorter supporting posts
US9099364B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 15, 2014 |
| Grant date | Aug 4, 2015 |
| Priority date | — |
| Expiry date | Aug 15, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2225/06513
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a MPS-C2 (Metal Post Soldering Chip Connection) semiconductor device having shorter supporting posts. Bonding pads are reentrant from a wafer-level packaging (WLP) layer formed on the active surface. A patterned UBM metal layer includes a plurality of UBM pads disposed on the bonding pads and at least a UBM island disposed on the WLP layer. The island area of the UBM island on the WLP layer is at least four times larger than the unit area of the UBM pads. A plurality of I/O pillars are one-to-one disposed on the UBM pads by plating and a plurality of supporting pillars are many-to-one disposed on the UBM island by one plating process. The unit footprint of the supporting pillars on the UBM island is smaller than the unit footprint of the I/O pillars on the UBM pads so as to compensate the height difference between the top jointing surfaces of the supporting pillars and the I/O pillars.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.