Post-passivation interconnect structure and method of forming the same
US9099396B2 · kind B2 · utility
6Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2011 |
| Grant date | Aug 4, 2015 |
| Priority date | — |
| Expiry date | Nov 14, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/2064
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a conductive layer formed on the surface of a post-passivation interconnect (PPI) structure by an immersion tin process. A polymer layer is formed on the conductive layer and patterned with an opening to expose a portion of the conductive layer. A solder bump is then formed in the opening of the polymer layer to electrically connect to the PPI structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.