Nonvolatile resistor network assembly and nonvolatile logic gate with increased fault tolerance using the same
US9100013B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 6, 2012 |
| Grant date | Aug 4, 2015 |
| Priority date | — |
| Expiry date | Sep 6, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/18
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided is a nonvolatile resistor network assembly characterized by that: it comprises a first and a second resistor network which are each composed of a plurality of nonvolatile resistive elements connected together; it also comprises a write means for writing into the first and second resistor networks; and writing into the first and second resistor networks is performed by the use of the write means in a manner to make total resistances of respectively the first and second resistor networks different from each other. Further provided is a nonvolatile logic gate which performs logical operation using stored data determined by the total resistances of the respective nonvolatile resistor networks.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.