Data interface circuit for capturing received data bits including continuous calibration
US9100027B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2014 |
| Grant date | Aug 4, 2015 |
| Priority date | — |
| Expiry date | Apr 19, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00019
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Circuits and methods for implementing a continuously adaptive timing calibration training function in an integrated circuit interface are disclosed. A mission data path is established where a data bit is sampled by a strobe. A similar reference data path is established for calibration purposes only. At an initialization time both paths are calibrated and a delta value between them is established. During operation of the mission path, the calibration path continuously performs calibration operations to determine if its optimal delay has changed by more than a threshold value. If so, the new delay setting for the reference path is used to change the delay setting for the mission path after adjustment by the delta value. Circuits and methods are also disclosed for performing multiple parallel calibrations for the reference path to speed up the training process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.