Patent · US Active

On-chip probe circuit for detecting faults in an FPGA

US9103880B2 · kind B2 · utility

2Cited by
5References
19Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJul 2, 2013
Grant dateAug 11, 2015
Priority date
Expiry dateFeb 10, 2034

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/318519
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

An integrated programmable logic circuit having a read/write probe includes a plurality of programmable logic circuits having internal circuit nodes and a plurality of flip flops, each having an asynchronous data input line, an asynchronous load line, and a data output connected to an internal circuit node, a probe-data line, an address circuit for selecting one of the internal circuit nodes, a read-probe enable line for selectively coupling the selected one of the internal circuit nodes to the probe-data line, a data input path to the asynchronous data input line of each flip flop, a write-probe data input path to the asynchronous data input line of each flip flop, a write-probe enable line, and selection circuitry, responsive to the address circuit and the write-probe enable line, to couple one of the data input path and the write-probe data input path to the asynchronous data input of a selected flip flop.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.